Syllabus - DIGITAL ELECTRONICS (EI404)

Minimization Techniques And Logic Gates

Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem -Principle of Duality - Boolean expression - Minimization of Boolean expressions-Minterm – Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization – Don’t care conditions - Quine-McCluskey method of minimization. Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive–OR NORImplementations of Logic Functions using gates, NAND–NOR implementations – Multi level gate implementations- Multi output gate implementations. TTL and CMOS Logic and their characteristics – Tristate gates

Combinational Circuits

Design procedure – Half adder – Full Adder – Half subtractor – Full subtractor – Parallel binary adder, parallel binary Subtractor – Fast Adder - Carry Look Ahead adder – Serial Adder/Subtractor - BCD adder – Binary Multiplier – Binary Divider - Multiplexer/ Demultiplexer – decoder - encoder – parity checker – parity generators – code converters - Magnitude Comparator.

Sequential Circuits

Latches, Flip-flops - SR, JK, D, T, and Master-Slave – Characteristic table and equation–Application table – Edge triggering – Level Triggering – Realization of one flip flop using other flip flops – serial adder/subtractor- Asynchronous Ripple or serial counter – Asynchronous Up/Down counter - Synchronous counters – Synchronous Up/Down counters – Programmable counters – Design of Synchronous counters: state diagram- State table –State minimization –State assignment - Excitation table and maps-Circuit implementation - Modulo–n counter, Registers – shift registers - Universal shift Registers– Shift register counters – Ring counter – Shift counters - Sequence generators.

Memory Devices

Classification of memories – ROM - ROM organization - PROM – EPROM – EEPROM –EAPROM, RAM – RAM organization – Write operation – Read operation. Static RAM Cell- Bipolar RAM cell – MOSFET RAM cell – Dynamic RAM cell. Implementation of combinational logic circuits using ROM, PLA, PAL.

Synchronous & Asynchronous Circuit

Synchronous Sequential Circuits: General Model – Classification – Design – Use of Algorithmic State Machine. Asynchronous Sequential Circuits: Design of fundamental mode and pulse mode circuits – Incompletely specified State Machines – Problems in Asynchronous Circuits.