Syllabus - COMPUTER ORGANIZATION & ARCHITECHTURE (CB 302)

Revision of basics in Boolean logic and Combinational/Sequential Circuits.

Functional blocks of a computer: CPU, memory, input-output subsystems, control unit. Instruction set architecture of a CPU: Registers, instruction execution cycle, RTL interpretation of instructions, addressing modes, instruction set. Outlining instruction sets of some common CPUs.

Data representation

Signed number representation, fixed and floating point representations, character representation.

Computer arithmetic

Integer addition and subtraction, ripple carry adder, carry look-ahead adder, etc. multiplication – shift-and-add, Booth multiplier, carry save multiplier, etc. Division restoring and non-restoring techniques, floating point arithmetic, IEEE 754 format.

Introduction to x86 architecture.

CPU control unit design

Hardwired and micro-programmed design approaches, design of a simple hypothetical CPU.

Memory system design

Semiconductor memory technologies, memory organization.

Peripheral devices and their characteristics

Input-output subsystems, I/O device interface, I/O transfers – program controlled, interrupt driven and DMA, privileged and non-privileged instructions, software interrupts and exceptions. Programs and processes – role of interrupts in process state transitions, I/O device interfaces – SCII, USB

Pipelining

Basic concepts of pipelining, throughput and speedup, pipeline hazards.

Parallel Processors

Introduction to parallel processors, Concurrent access to memory and cache coherency.

Memory organization

Memory interleaving, concept of hierarchical memory organization, cache memory, cache size vs. block size, mapping functions, replacement algorithms, write policies.