Syllabus - Computer Organization & Architecture of Digital Logic Circuits (CD504 (C))

CSE-Data Science/Data Science

Computer Organization & Architecture of Digital Logic Circuits (CD504 (C))

V semester

Unit I

Review representation.Computer Arithmetic: Integer and Floating Point Arithmetic operations.

Computer Organization v/s Architecture,Milestonesin Computer Architecture, Basic Structure of Computer System, Componentsof Computer System-CPU;Memory;System Bus- Bus width, Bus Operations;I/O subsystem. CPU Organization: General Register Organization-Memory Register, Instruction Register; Control Word, Stack Organization; ALU, Control Unit.

Unit II

(A) Machine Language Level/Instruction Set Architecture (ISA) level: Instruction Set- Machine Instruction Characteristics, Types of operands, Types of operations; Instruction Types, Instruction Formats, Addressing Modes; Registers, Program Counter; Instruction Execution Cycle;Interrupts and Traps, Sources of interrupts, Interrupt identification and priorities, Interrupt servicing.Case Study of 8086 Microprocessor.

(B)Control Unit: Hardwired Control Unit;Micro-programmed Control Unit-Micro Instructions, Micro Instruction Formats, Micro Instruction Control, Micro program sequencer, Execution of Micro Instructions.

Unit III

Main memory-RAM, ROM; Memory Hierarchy, Memory Organization: Technologies; Memory Addresses, Memory Address Map; Flash Memory; Associative Memory, Cache Memory: Cache Structure and Design, Mapping Schemes, Replacement Algorithms, Improving Cache Performance; Concept of L1, L2, L3 Cache. Secondary Memory –Magnetic Tape, Magnetic Disk, Optical Disks, Solid State Disk.

Unit IV

I/O Organization: Data Transfer- Serial, Parallel, Synchronous, Asynchronous Modes of Data Transfer, I/O Techniques- Programmed I/O,Direct Memory I/O, Access(DMA); External Interconnection Standards (I/O Interfaces): PCI Bus,PCI Express, SCSI Bus, USB; I/O Channels and I/O Processors; I/O Instructions. Interrupt driven

Unit V

Parallel Architectures:On-chip parallelism, Thread level parallelism, Instruction level parallelism; Multicore Processor Architecture;Processor level parallelism; Overview of Pipelining, Vector Processing and Array Processing. RISC vs CISC Architectures. Introduction to ARM processor and its architecture. Introduction to Assembly Language Programming.

Practicals

Reference Books

  • William Stallings, “Computer Organization and architecture”, Pearson.

  • Tannenbaum and Austin, “Structured Computer Organization”, PHI.

  • V. Carl Hamacher, “Computer Organization”, McGraw Hill.

  • John P. Hayes, “Computer Architecture and Organization”, TMH.

  • Morris Mano, “Computer System Architecture”, PHI.

  • David A. Patterson and John L. Hennessy, “Computer Organization and Design: The Hardware/Software Interface”, Morgan Kauffman.

  • M. Usha, T.S. Shrikant: “Computer System Architecture and Organization”, Willey India.

  • Chaudhuri, P.Pal: “Computer Organization and Design”,PHI

  • Sarangi: “Computer Organization and Architecture”, McGraw Hill.