Draw logic diagram of JK Flip-Flop and give its characteristics table and equation.


Q.) Draw logic diagram of JK Flip-Flop and give its characteristics table and equation.

Subject: Digital Logic Design

Logic Diagram of JK Flip-Flop

A JK flip-flop is a refinement of the SR flip-flop in that it removes the invalid condition when both inputs are high. The JK flip-flop has two inputs, traditionally labeled J and K, and two outputs, Q and the complement of Q (notated as Q'). The logic diagram of a JK flip-flop is as follows:

  J   K   Q(t)   Q(t+1)   Description
  0   0    0       0      No change (Hold state)
  0   0    1       1      No change (Hold state)
  0   1    0       0      Reset
  0   1    1       0      Reset
  1   0    0       1      Set
  1   0    1       1      Set
  1   1    0       1      Toggle
  1   1    1       0      Toggle

The logic diagram for a JK flip-flop is typically represented using NAND gates as follows:

  +---+    +---+
  | J |----|   |
  |   |    |NAND|----+
  |   |    |   |    |
  +---+    +---+    |    +---+    +---+
                    +----|   |----|   |
  +---+    +---+    |    |NAND|    |NAND|
  | K |----|   |    |    |   |    |   |
  |   |    |NAND|----+    +---+    +---+
  |   |    |   |                    |  Q
  +---+    +---+                    |
                                    |
  +---+    +---+                    |
  |CLK|----|   |                    |
  |   |    |NAND|-------------------+
  |   |    |   |
  +---+    +---+

In this diagram, the J and K inputs are fed into two NAND gates which are then connected to a pair of cross-coupled NAND gates that form the memory element of the flip-flop. The clock input (CLK) is used to synchronize the flip-flop's operation.

Characteristics Table of JK Flip-Flop

The characteristics table of a JK flip-flop shows the relationship between the inputs (J, K, and CLK) and the resulting state of the outputs (Q and Q'). Here is the table:

J K Q(t) Q(t+1) Description
0 0 0 0 No change (Hold)
0 0 1 1 No change (Hold)
0 1 0 0 Reset
0 1 1 0 Reset
1 0 0 1 Set
1 0 1 1 Set
1 1 0 1 Toggle
1 1 1 0 Toggle

In this table, Q(t) represents the current state of the flip-flop, and Q(t+1) represents the state of the flip-flop at the next clock pulse.

Equation of JK Flip-Flop

The characteristic equation of the JK flip-flop describes the next state (Q(t+1)) as a function of the current state (Q(t)) and the inputs (J and K). The equation is:

Q(t+1) = (J * ~Q(t)) + (~K * Q(t))

This equation can be understood as follows:

  • If J is high and K is low (~K), the flip-flop is set (Q(t+1) = 1).
  • If J is low and K is high, the flip-flop is reset (Q(t+1) = 0).
  • If both J and K are low, the flip-flop holds its current state (Q(t+1) = Q(t)).
  • If both J and K are high, the flip-flop toggles its state (Q(t+1) = ~Q(t)).

Example

Let's consider an example where the JK flip-flop is initially in the reset state (Q = 0). If we apply the following inputs:

  1. J = 1, K = 0 (Set condition)
  2. J = 0, K = 1 (Reset condition)
  3. J = 1, K = 1 (Toggle condition)

The outputs will be:

  1. After the first clock pulse, the flip-flop will be set (Q = 1).
  2. After the second clock pulse, the flip-flop will be reset (Q = 0).
  3. After the third clock pulse, since both J and K are high, the flip-flop will toggle its state (Q = 1).

This example demonstrates how the JK flip-flop responds to different input conditions according to its characteristic table and equation.