Explain working of PMOS, NMOS and CMOS logic.


Q.) Explain working of PMOS, NMOS and CMOS logic.

Subject: Digital Circuit Design

PMOS Logic

PMOS (P-channel Metal-Oxide-Semiconductor) logic is a type of complementary MOS (CMOS) logic where the active pull-up element is a PMOS transistor and the active pull-down element is an NMOS transistor. The basic structure of PMOS logic is as follows:

  • Pull-up Network: Consists of a single PMOS transistor connected between the output node and the power supply (Vdd).
  • Pull-down Network: Consists of a single NMOS transistor connected between the output node and ground (Vss).
  • Input Network: Consists of NMOS transistors that are connected between the inputs and the power supply.

Operation of PMOS Logic:

  1. Active Pull-up and Pull-down:

    • When both PMOS and NMOS transistors are off (i.e., Vinput = 0), the output node is pulled to Vdd by the PMOS transistor. This is the "logic 1" state.
    • When both PMOS and NMOS transistors are on (i.e., Vinput = Vdd), the output node is pulled to Vss by the NMOS transistor. This is the "logic 0" state.
  2. Input Inversion:

    • In PMOS logic, the input signals are inverted at the NMOS transistors in the input network. This means that a logic "0" input results in a logic "1" output, and vice versa.
  3. Output Voltage Range:

    • The output voltage range of PMOS logic is typically from Vss to Vdd. However, it can be limited by the threshold voltages of the PMOS and NMOS transistors.

NMOS Logic:

NMOS (N-channel Metal-Oxide-Semiconductor) logic is another type of CMOS logic where the active pull-up element is an NMOS transistor and the active pull-down element is a PMOS transistor. The basic structure of NMOS logic is similar to PMOS logic, with the PMOS and NMOS transistors swapped.

Operation of NMOS Logic:

  1. Active Pull-up and Pull-down:

    • When both NMOS and PMOS transistors are off (i.e., Vinput = 0), the output node is pulled to Vss by the NMOS transistor. This is the "logic 0" state.
    • When both NMOS and PMOS transistors are on (i.e., Vinput = Vdd), the output node is pulled to Vdd by the PMOS transistor. This is the "logic 1" state.
  2. Input Inversion:

    • Similar to PMOS logic, the input signals are inverted at the PMOS transistors in the input network. This means that a logic "0" input results in a logic "1" output, and vice versa.
  3. Output Voltage Range:

    • The output voltage range of NMOS logic is also typically from Vss to Vdd, subject to the limitations posed by the threshold voltages of the NMOS and PMOS transistors.

CMOS Logic:

CMOS (Complementary MOS) logic is a more advanced form of MOS logic that combines both PMOS and NMOS transistors to overcome some of the limitations of PMOS and NMOS logic. The basic structure of CMOS logic is as follows:

  • Pull-up Network: Consists of a PMOS transistor connected between the output node and the power supply (Vdd).
  • Pull-down Network: Consists of an NMOS transistor connected between the output node and ground (Vss).
  • Input Network: Consists of NMOS and PMOS transistors that are connected between the inputs and the power supply.

Operation of CMOS Logic:

  1. Complementary Pull-up and Pull-down:

    • In CMOS logic, both PMOS and NMOS transistors are used in a complementary fashion. When one transistor is on, the other is off, and vice versa. This allows for efficient switching between logic states.
    • When the input is logic "0," the NMOS transistor is on and the PMOS transistor is off, pulling the output node to Vss.
    • When the input is logic "1," the NMOS transistor is off and the PMOS transistor is on, pulling the output node to Vdd.
  2. No Input Inversion:

    • Unlike PMOS and NMOS logic, CMOS logic does not require input inversion. This simplifies the design of logic circuits.
  3. Low Power Consumption:

    • CMOS logic consumes very little power because both PMOS and NMOS transistors are off during switching transitions. This makes CMOS logic ideal for low-power applications.
  4. Wide Output Voltage Range:

    • CMOS logic has a wide output voltage range, typically from Vss to Vdd, making it suitable for interfacing with a variety of devices.

In summary, PMOS and NMOS logic are basic forms of MOS logic, while CMOS logic combines both PMOS and NMOS transistors to offer better performance and lower power consumption. CMOS logic is the most widely used type of logic in modern integrated circuits.